C/c++ Python Tcl Perl Shell

System Verilog Uvm

Asic Verification Frontend Verification Verification Universal Verification Methodo... Vhdl

Ams Verilog Systemverilog C

Network Design Product Development Formal Verification System Requirements Business Development

Verilog System Verilog C/c++

Embedded Synopsys Cadence Eda

ServiceNow Certified System Ad... ServiceNow Flow Designer Micro... Rest Javascript Glideajax

Onbase Certification Design Specifications Design Develop Code

Debugging C++ Design Verification

Confluence Jira Git

Uvmsystem VerilogVerificationEngineer Fpga Designs

Uvm System Verilog C C++ Perl

Pnr Jira Perl Python

Bash/csh Perl Tcl Python