Python Perl Shell Tcl Dft

Embedded Synopsys Cadence Eda

Synopsys

System-verilog Python Synopsys Circuit Designer

Spcie (hspice & Pspice) Spectre Calibre Synopsys’ Nanosim Cadence’s Ultrasim

SystemVerilog Verilog RTL Design Synopsys Cadence

Synopsys Design Compiler Verplex LEC ASIC design

Design For Test (dft) Scan Insertion Atpg Jtag Bist

Synopsys Design Compiler Spyglass Spyglass Cdc Cadence Genus Jaspergold

Synopsys Primetime Cadence Tempus Scripting (tcl Perl) Verilog