Skills: What we are looking for:
Bachelor's degree in electronic engineering or the equivalent qualification in training and experience.
8+ years of professional engineering experience, including experience in advanced technology nodes: 28nm, 16nm, and below.
Familiar with industry standard CAD methodologies from Cadence, Synopsys, and/or Mentor.
Successful execution of timing constraint development in previous projects.
Solid analytical, communication, and presentation skills.
Timing Constraint, RTL Coding, and lint checking.
Experience with Primetime (Synopsys).
Synthesis tool exp: Genus (Cadence) and Fusion compiler/design compiler(Synopsis)
Bachelor's degree