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RTL Design Engineer (IP Level)

 HRP Global Technologies
  • 4-12 years of experience
  • Flexible Position
  • 1 opening
Synopsys Design Compiler Spyglass Spyglass Cdc Cadence Genus Jaspergold
Bangalore, Karnataka, India
30+ Days Ago
30+ Days Ago
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ASIC Design Engineer

 Juniper Networks
  • Flexible Position
Synopsys Design Compiler Verplex LEC ASIC design
Bangalore, Karnataka, India
30+ Days Ago
30+ Days Ago