System Verilog C/c++ Python

Layout Design Circuit Design Skills Physical Verification

Python Perl Groovy Scala & Javascript

Systemverilog (sv) Uvm Vhdl

C C++ Python TCL Perl

Verification Simulation ABV Debugging UVM

Processor Architecture Arm Architecture Hardware Design Verification C Python

AMBA ARM Architecture SoC UVM

Data Analytics Test Methodologies Verification and Validation (V... DOE OQ

HiL Software Verification

MiL (Model-in-Loop) SiL (Software-in-Loop) and HiL

C C++ Perl Python Tcl

HiL SiL

Avionics DO-254 Electronic Hardware Hardware Configuration Logic Gates

Windows Linux Vm’s Cloud Python