System Verilog C++ Uvm Axi Amba

VHDL Verilog Test bench design Design verification PCB layout

C C++ System Verilog Xcelium UVM

Verilog SystemVerilog UVM

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C C++ hardware and firmware design Altium Eagle

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Application-Specific Integrate... Computer Simulations System on a Chip (SoC) SystemVerilog Unified Power Format (UPF)

Facebook is the End Client UVM... driver monitor scoreboard agent development System Veri...

Python Uvm Api Testing

Python test scripts

Python CAPL CICD

matlab python JMP

Altium PSPICE LTSPICE Hardware Testing encompassing design

Interpersonal Skills Software Testing Design Documents System Architecture