Facebook is the End Client UVM... driver monitor scoreboard agent development System Veri...

Formality CDC Design Strong analytical System Verilog

System Verilog C/c++ Python

C/c++ System Verilog verification Scripting Language Shell Makefile

Design For Test (dft) Scan Insertion Atpg Jtag Bist

Perl Python Tcl Verilog NDM

HardwareDesignDeveloper Verilog SystemVerilog VHDL Scripting

ASIC CAD tools Developing Verilog RTL Functional Behavioral Models

Spring Boot verizon

Linux Scripting C/c++ System Verilog Uvm

C-shell Scripting Verilog-hdl System Verilog Python C

C C++ Assembler Amba Python

DDR PCIe Verilog DFM

.NET developer JSON XUnit C# Entity Framework Code

C++ OOP System Verilog UVM OVM