C++ Android Framework Java Kotlin Android SDK

Hardware Validation Verilog LabViEW Python C++

Embedded #Android #HAL #Audio #Video

VHDL Verilog Cadence OrCad Xilinx Vivado Altera

Python Sql Gcp Azure Aws

Vhdl Omnibus Ethernet Spi I2c

a passion for team leadership

VHDL Verilog Microcontrollers BASH Perl

Verilog Vhdl Systemverilog Python Perl

Synopsys Primetime Cadence Tempus Scripting (tcl Perl) Verilog

Java/Kotlin app development C++ Android Hal Android Systemui Aidl

Verilog Systemverilog Vhdl Soc Design Principles Cpu Architectures

Embedded #Android #HAL #Audio #Video

C C++ RTOS Android Linux

Jquery Bootstrap Java 8 Cucumber Selenium