AMBA ARM Architecture SoC UVM

Data Analytics Test Methodologies Verification and Validation (V... DOE OQ

HiL Software Verification

MiL (Model-in-Loop) SiL (Software-in-Loop) and HiL

Hardware Validation Verilog LabViEW Python C++

C C++ Perl Python Tcl

HiL SiL

ASIC IP Verification UVM Development AHB/AXI PERL Python

Windows Linux Vm’s Cloud Python

written verbal communication Problem Solving Arm Logic Verification

DOE GD& T Siemens NX 3D CAD JMP

C++ ClearCase SoC SystemVerilog Subversion

C++ Debugging Digital Designs Functional Verification Perl

ASIC Computer Simulations GLS HVL SoC

System Testing