ASIC IP Verification UVM Development AHB/AXI PERL Python

Windows Linux Vm’s Cloud Python

written verbal communication Problem Solving Arm Logic Verification

C++ ClearCase SoC SystemVerilog Subversion

ASIC Computer Simulations GLS HVL SoC

System Testing

C-shell Scripting Verilog-hdl System Verilog Python C

C C++ Python TCL Perl

dependent Verification and Val...

Embedded System Hardware Tcl Perl Python Embedded C

HiL Software Verification

Software development Software verification Avionics

DOE GD& T Siemens NX 3D CAD JMP

Embedded Synopsys Cadence Eda

Soc Verification Uvm/ovm Systemverilog ASIC-SoC Design verification Debugging