Description

  • As a member of verification team, you will work with leading industry tools and design & verification concepts to achieve full functional, performance & power verification closure on a variety of digital design blocks which are a part of the Graphics Core IP (GFXIP).
  • You will work closely with architects, designers and other design verification engineers to author testplan for pre-silicon verification, planning & development of testbenches to exercise the design, write detailed testplans to cover new blocks and features, drive the development of test-cases and coverpoints or assertions to achieve verification closure.


 


Key Responsibilities:

  • Work closely with the architect, RTL designers and other verification engineers to achieve verification closure within project schedules;
  • Be responsible for functional, power and performance verification of a block, including verification planning, execution and DV closure;
  • Develop and execute test and coverage plans to ensure the functional, performance and power completeness;
  • Create, reuse and debug testbenches, verification components and tests for verification of the design;
  • Be expected to adopt the evolving verification methodologies used in the industry to functionally verify increasingly more complex SoC designs within aggressive, market-driven schedules, and work within the existing verification infrastructure on currently active projects.


Experience and Education:

  • Minimum 5+ years of verification experience on large ASIC development projects;
  • Solid understanding of Computer Architecture and Digital Design concepts;
  • Very strong background in Verilog, System Verilog, C/C++/OOO coding techniques;
  • Experience working with UVM, OVM or equivalent;
  • Experience with constrained random verification, functional coverage and assertions;
  • Experience with formal verification is an added advantage;
  • Familiarity with one of the scripting languages: perl/tcl/ruby/Bash/python;
  • Experience working with industry standards tools such Synopsys VCS, VC Formal, DVE, Verdi, GDB or equivalent;
  • Strong analytical skills and attention to detail;
  • Bachelor’s (or preferably Master’s) degree in Computer Engineering, Computer Science, Electrical Engineering or similar
  • tests and plan

Education

Bachelor's or Master's degrees