Description

  • This requirement is for an experienced FPGA design engineer to design, and develop FPGAfirmware for next-generation Prysm Display Solutions
  • The work includes developing Algorithms for the key IP blocks, provide a platform abstraction layer for all system related activities, develop Protocol stack, and optimize the overall video pipeline for higher performance
  • There are lot of new IPs that are getting integrated for the first time and it in turn gives very good opportunity for the engineers to address complex challenges and innovate at the same time
  • It also helps them understand the overall product lifecycle right from concept stage to productization
  • He/ She will lead the design effort on a variety of projects in a highly collaborative, dynamic environment
  • He /She will work closely with other partners such as product and marketing managers, designers and other software engineers seated across the globe to develop new product offerings and improve the efficiency of the solution
  • Performing the RTL and Verilog coding procedures
  • Execute the FPGA verification and simulation activities
  • Own and maintain the requirement, architecture, coding, and test-bench document
  • Maintain an effective means of communication among the intra or inter-department personnel and to work in a dynamic work atmosphere where one needs to be cooperative with the other associates of the team seated either locally or globall
  • Required to provide adequate laboratory assistance to other professionals of the department
  • Enforcing and improving the algorithms that are related to the signal and information processing activities
  • Required to perform the job of producing digital circuit designs that can work at an advanced speed limit at various board levels
  • Support in the production introduction of newly developed PCBAs
  • Manufacturing support / product maintenance / adaptation developments and application of the product realization process (LEAN, PLM process)

Qualifications:

  • Exp: 8-10 Years

Must have:

  • B.E. or M.E. or MTech Degree in Computer Science or Electrical or Electronics Engineering
  • Must have 5 - 10 years of work experience
  • Expertise in Verilog and System Verilog Coding and RTL Abstraction
  • Working in Xilinx, Vivado or Questa Sim Environment
  • Working with High-Speed Data, I/O and Integrated CPU
  • Working with multiple clock domains
  • Proficient in Digital Design Concepts, Design Tools, Simulation, Timing and Modelling
  • Working in handling of Fast Data to Slow and vice-versa
  • Working in handling Data to and from DDR
  • Know-how of SerDes (Serial / De-serializer)
  • Know-how of AMBA, AHB, AXI Protocols
  • Must have working experience with 12C, EEPROM, SPI, EMMC devices
  • Hands on to create, burn and debug FPGA Binaries